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Constructing Reliable Super Dense Phase Change Memory under Write Disturbance

Wang, Rujia (2015) Constructing Reliable Super Dense Phase Change Memory under Write Disturbance. Master's Thesis, University of Pittsburgh. (Unpublished)

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Phase Change Memory (PCM) has better scalability and smaller cell size comparing to DRAM. However, further scaling PCM cell in deep sub-micron regime results in significant thermal based write disturbance. Naively allocating large inter-cell space increases cell size from ideal 4F^2 to 12F^2. While a recent work mitigates write disturbance along word-lines through disturbance resilient data encoding, which can shrink PCM cell size from 12F^2 to 8F^2, it is ineffective for write disturbance along bit-lines, which is more severe due to widely adopted uTrench structure in constructing PCM cell arrays.

In this thesis, we propose SD-PCM, an architecture to achieve reliable write operations in Super Dense PCM. In particular, we focus on mitigating write disturbance along bit-lines such that we can construct super dense PCM chips with 4F^2 cell size, i.e., the minimal for diode-switch based PCM. Based on simple verification-n-correction (VnC), we propose LazyCorrection and PreRead to effectively reduce VnC overhead and minimize cascading verification during write. We further propose (n:m)-Alloc for achieving good tradeoff between VnC overhead minimization and memory capacity loss. Our experimental results show that, comparing to a write disturbance-free low density PCM, SD-PCM achieves 80% capacity improvement in cell arrays while incurring around 0-10% performance degradation when using different (n:m) allocators.


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Item Type: University of Pittsburgh ETD
Status: Unpublished
CreatorsEmailPitt UsernameORCID
Wang, Rujiaruw16@pitt.eduRUW16
ETD Committee:
TitleMemberEmail AddressPitt UsernameORCID
Committee ChairYang, Junjuy9@pitt.eduJUY9
Committee CoChairZhang, Youtaozhangyt@cs.pitt.eduYOUTAO
Committee MemberLevitan, Steven Plevitan@pitt.eduLEVITAN
Committee MemberMohanram, Kartikkmram@pitt.eduKMRAM
Date: 8 June 2015
Date Type: Publication
Defense Date: 26 February 2015
Approval Date: 8 June 2015
Submission Date: 21 March 2015
Access Restriction: No restriction; Release the ETD for access worldwide immediately.
Number of Pages: 45
Institution: University of Pittsburgh
Schools and Programs: Swanson School of Engineering > Electrical and Computer Engineering
Degree: MSEE - Master of Science in Electrical Engineering
Thesis Type: Master's Thesis
Refereed: Yes
Uncontrolled Keywords: Phase Change Memory, Write Disturbance
Date Deposited: 08 Jun 2015 17:45
Last Modified: 15 Nov 2016 14:26


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