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Low Energy Solutions for FIFOs in Networks on Chip

Kline Jr, Donald E (2018) Low Energy Solutions for FIFOs in Networks on Chip. Master's Thesis, University of Pittsburgh. (Unpublished)

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To continue the progress of Moore's law at the end of Dennard Scaling, computer architects turned to multi-core systems, connected by networks-on-chip (NoCs). As this trend persisted, NoCs became a leading energy consumer in modern multi-core processors, with a significant percent originating from the large number of virtual channel (FIFO) buffers. In this work, two orthogonal methods to reduce the use-phase energy of these FIFO buffers are discussed. The first is a reservation based circuit-switching multi-hop routing design, multi-hop segmented circuit switching (MSCS). In a 2D arrangement of an NoC, MSCS performs network control at most once in each dimension for a packet, compared to leading multi-hop approaches which often require multiple arbitration steps. This design resulted in a reduction of FIFO buffer storage by 50% over the leading multi-hop scheme with a nominal latency improvement (1.4%). The second method discussed is the intelligent replacement of SRAM with Domain-Wall Memory (DWM) FIFOs, enabled by novel control schemes which leverage the ''shift-register'' nature of spintronic DWM to create extremely low-energy FIFO queues. The most efficiently designed shift-based buffer used a dual-nanowire approach to more effectively align read and writes to the FIFO with the limited access ports.


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Item Type: University of Pittsburgh ETD
Status: Unpublished
CreatorsEmailPitt UsernameORCID
Kline Jr, Donald Edek61@pitt.edudek61
ETD Committee:
TitleMemberEmail AddressPitt UsernameORCID
Committee ChairJones, Alexakjones@pitt.eduakjones
Committee MemberMelhem, Ramimelhem@cs.pitt.edumelhem
Committee MemberMao, Zhi-Hongzhm4@pitt.eduzhm4
Date: 24 January 2018
Date Type: Publication
Defense Date: 15 August 2017
Approval Date: 24 January 2018
Submission Date: 17 August 2017
Access Restriction: No restriction; Release the ETD for access worldwide immediately.
Number of Pages: 61
Institution: University of Pittsburgh
Schools and Programs: Swanson School of Engineering > Electrical and Computer Engineering
Degree: MS - Master of Science
Thesis Type: Master's Thesis
Refereed: Yes
Uncontrolled Keywords: Networks on Chip, FIFO buffers, low-energy, segmented circuit switching, domain wall memory
Date Deposited: 24 Jan 2018 19:13
Last Modified: 24 Jan 2018 19:13


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