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Design and Robustness Analysis on Non-volatile Storage and Logic Circuit

Wang, Peiyuan (2012) Design and Robustness Analysis on Non-volatile Storage and Logic Circuit. Master's Thesis, University of Pittsburgh. (Unpublished)

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By combining the flexibility of MOS logic and the non-volatility of spintronic devices, spin-MOS logic and storage circuitry offer a promising approach to implement highly integrated, power-efficient, and nonvolatile computing and storage systems. Besides the persistent errors due to process variations, however, the functional correctness of Spin-MOS circuitry suffers from additional non-persistent errors that are incurred by the randomness of spintronic device operations, i.e., thermal fluctuations. This work quantitatively investigates the impact of thermal fluctuations on the operations of two typical Spin-MOS circuitry: one transistor and one magnetic tunnel junction (1T1J) spin-transfer torque random access memory (STT-RAM) cell and a nonvolatile latch design. A new nonvolatile latch design is proposed based on magnetic tunneling junction (MTJ) devices. In the standby mode, the latched data can be retained in the MTJs without consuming any power. Two types of operation errors can occur, namely, persistent and non-persistent errors. These are quantitatively analyzed by including models for process variations and thermal fluctuations during the read and write operations. A mixture importance sampling methodology is applied to enable yield-driven design and extend its application beyond memories to peripheral circuits and logic blocks. Several possible design techniques to reduce thermal induced non-persistent error rate are also discussed.


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Item Type: University of Pittsburgh ETD
Status: Unpublished
CreatorsEmailPitt UsernameORCID
Wang, Peiyuanwap15@pitt.eduWAP15
ETD Committee:
TitleMemberEmail AddressPitt UsernameORCID
Committee ChairChen, Yiranyic52@pitt.eduYIC52
Committee MemberLevitan, Stevenlevitan@pitt.eduLEVITAN
Committee MemberYang, Junjuy9@pitt.eduJUY9
Date: 2 February 2012
Date Type: Publication
Defense Date: 18 October 2011
Approval Date: 2 February 2012
Submission Date: 3 November 2011
Access Restriction: No restriction; Release the ETD for access worldwide immediately.
Number of Pages: 64
Institution: University of Pittsburgh
Schools and Programs: Swanson School of Engineering > Electrical Engineering
Degree: MS - Master of Science
Thesis Type: Master's Thesis
Refereed: Yes
Uncontrolled Keywords: non-persistent, process variation, spin-MOS, STTRAM, non-volatile
Date Deposited: 02 Feb 2012 14:16
Last Modified: 15 Nov 2016 13:35


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