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A Micro Power Hardware Fabric for Embedded Computing

Mehta, Gayatri (2009) A Micro Power Hardware Fabric for Embedded Computing. Doctoral Dissertation, University of Pittsburgh. (Unpublished)

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Field Programmable Gate Arrays (FPGAs) mitigate many of the problemsencountered with the development of ASICs by offering flexibility, faster time-to-market, and amortized NRE costs, among other benefits. While FPGAs are increasingly being used for complex computational applications such as signal and image processing, networking, and cryptology, they are far from ideal for these tasks due to relatively high power consumption and silicon usage overheads compared to direct ASIC implementation. A reconfigurable device that exhibits ASIC-like power characteristics and FPGA-like costs and tool support is desirable to fill this void. In this research, a parameterized, reconfigurable fabric model named as domain specific fabric (DSF) is developed that exhibits ASIC-like power characteristics for Digital Signal Processing (DSP) style applications. Using this model, the impact of varying different design parameters on power and performance has been studied. Different optimization techniques like local search and simulated annealing are used to determine the appropriate interconnect for a specific set of applications. A design space exploration tool has been developed to automate and generate a tailored architectural instance of the fabric.The fabric has been synthesized on 160 nm cell-based ASIC fabrication process from OKI and 130 nm from IBM. A detailed power-performance analysis has been completed using signal and image processing benchmarks from the MediaBench benchmark suite and elsewhere with comparisons to other hardware and software implementations. The optimized fabric implemented using the 130 nm process yields energy within 3X of a direct ASIC implementation, 330X better than a Virtex-II Pro FPGA and 2016X better than an Intel XScale processor.


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Item Type: University of Pittsburgh ETD
Status: Unpublished
CreatorsEmailPitt UsernameORCID
Mehta, Gayatrigam30@pitt.eduGAM30
ETD Committee:
TitleMemberEmail AddressPitt UsernameORCID
Committee ChairJones, Alex K.akjones@ece.pitt.eduAKJONES
Committee MemberCheng,
Committee MemberHunsaker,
Committee MemberCain, James T.cain@ee.pitt.eduJTC
Committee MemberYang, Junjunyang@engr.pitt.eduJUY9
Date: 25 September 2009
Date Type: Completion
Defense Date: 20 July 2009
Approval Date: 25 September 2009
Submission Date: 30 June 2009
Access Restriction: No restriction; Release the ETD for access worldwide immediately.
Institution: University of Pittsburgh
Schools and Programs: Swanson School of Engineering > Electrical Engineering
Degree: PhD - Doctor of Philosophy
Thesis Type: Doctoral Dissertation
Refereed: Yes
Uncontrolled Keywords: embedded computing; low power; Reconfigurable computing; coarse-grained fabrics
Other ID:, etd-06302009-144326
Date Deposited: 10 Nov 2011 19:49
Last Modified: 15 Nov 2016 13:45


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