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PROGRAMMABLE NEURAL PROCESSING FRAMEWORK FOR IMPLANTABLE WIRELESS BRAIN-COMPUTER INTERFACES

Huang, Shimeng (2010) PROGRAMMABLE NEURAL PROCESSING FRAMEWORK FOR IMPLANTABLE WIRELESS BRAIN-COMPUTER INTERFACES. Master's Thesis, University of Pittsburgh. (Unpublished)

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Abstract

Brain-computer interfaces (BCIs) are able to translate cerebral cortex neural activity into control signals for computer cursors or prosthetic limbs. Such neural prosthetics offer tremendous potential for improving the quality of life for disabled individuals. Despite the success of laboratory-based neural prosthetic systems, there is a long way to go before it makes a clinically viable device. The major obstacles include lack of portability due to large physical footprint and performance-power inefficiency of current BCI platforms. Thus, there are growing interests in integrating more BCI's components into a tiny implantable unit, which can minimize the surgical risk and maximize the usability. To date, real-time neural prosthetic systems in laboratory require a wired connection penetrating the skull to a bulky external power/processing unit. For the wireless implantable BCI devices, only the data acquisition and spike detection stages are fully integrated. The rest digital post-processing can only be performed on one chosen channel via custom ASICs, whose lack of flexibility and long development cycle are likely to slow down the ongoing clinical research.This thesis proposes and tests the feasibility of performing on-chip, real-time spike sorting/neural decoding on a programmable wireless sensor network (WSN) node, which is chosen as a compact, low-power platform representative of a future implantable chip. The final accuracy is comparable to state-of-the-art open-loop neural decoder. A detailed power/performance trade-off analysis is presented. Our experimental results show that: 1)direct on-chip neural decoding without spike sorting can achieve 30Hz updating rate, with power density lower than 62mW/cm2; 2)the execution time and power density meet the requirements to perform real-time spike sorting and wireless transmission on a single neural channel. For the option of having spike sorting in order to keep all neural information, we propose a new neural processing workflow that incorporates a light-weight neuron selection method to the training process to reduce the number of channels required for processing. Experimental results show that the proposed method not only narrows the gap between the system requirement and current hardware technology, but also increase the accuracy of the neural decoder by 3%-22%, due to elimination of noisy channels.


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Details

Item Type: University of Pittsburgh ETD
Status: Unpublished
Creators/Authors:
CreatorsEmailPitt UsernameORCID
Huang, Shimengshh61@pitt.eduSHH61
ETD Committee:
TitleMemberEmail AddressPitt UsernameORCID
Committee ChairCheng, Allenacc33@pitt.eduACC33
Committee MemberSun, Minguidrsun@pitt.eduDRSUN
Committee MemberMao, Zhi-Hongmaozh@engr.pitt.eduZHM4
Date: 25 June 2010
Date Type: Completion
Defense Date: 6 April 2010
Approval Date: 25 June 2010
Submission Date: 2 April 2010
Access Restriction: No restriction; Release the ETD for access worldwide immediately.
Institution: University of Pittsburgh
Schools and Programs: Swanson School of Engineering > Electrical Engineering
Degree: MSEE - Master of Science in Electrical Engineering
Thesis Type: Master's Thesis
Refereed: Yes
Uncontrolled Keywords: BCI; implantable; neural decoding; spike sorting; wireless; WSN
Other ID: http://etd.library.pitt.edu/ETD/available/etd-04022010-050430/, etd-04022010-050430
Date Deposited: 10 Nov 2011 19:33
Last Modified: 15 Nov 2016 13:38
URI: http://d-scholarship.pitt.edu/id/eprint/6705

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