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DESIGN AUTOMATION FOR LOW POWER RFID TAGS

Dontharaju, Swapna Rao (2008) DESIGN AUTOMATION FOR LOW POWER RFID TAGS. Doctoral Dissertation, University of Pittsburgh. (Unpublished)

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Abstract

Radio Frequency Identification (RFID) tags are small, wireless devices capable of automated item identification, used in a variety of applications including supply chain management, asset management, automatic toll collection (EZ Pass), etc. However, the design of these types of custom systems using the traditional methods can take months for a hardware engineer to develop and debug. In this dissertation, an automated, low-power flow for the design of RFID tags has been developed, implemented and validated. This dissertation presents the RFID Compiler, which permits high-level design entry using a simple description of the desired primitives and their behavior in ANSI-C. The compiler has different back-ends capable of targeting microprocessor-based or custom hardware-based tags. For the hardware-based tag, the back-end automatically converts the user-supplied behavior in C to low power synthesizable VHDL optimized for RFID applications. The compiler also integrates a fast, high-level power macromodeling flow, which can be used to generate power estimates within 15% accuracy of industry CAD tools and to optimize the primitives and / or the behaviors, compared to conventional practices. Using the RFID Compiler, the user can develop the entire design in a matter of days or weeks. The compiler has been used to implement standards such as ANSI, ISO 18000-7, 18000-6C and 18185-7. The automatically generated tag designs were validated by targeting microprocessors such as the AD Chips EISC and FPGAs such as Xilinx Spartan 3. The corresponding ASIC implementation is comparable to the conventionally designed commercial tags in terms of the energy and area. Thus, the RFID Compiler permits the design of power efficient, custom RFID tags by a wider audience with a dramatically reduced design cycle.


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Details

Item Type: University of Pittsburgh ETD
Status: Unpublished
Creators/Authors:
CreatorsEmailPitt UsernameORCID
Dontharaju, Swapna Raosrd17@pitt.eduSRD17
ETD Committee:
TitleMemberEmail AddressPitt UsernameORCID
Committee ChairJones, Alex Kakjones@ece.pitt.eduAKJONES
Committee MemberNorman, Bryanbanorman@engr.pitt.eduBANORMAN
Committee MemberCain, James Tcain@engr.pitt.eduJTC
Committee MemberMickle, Marlin HMickle@engr.pitt.eduMICKLE
Committee MemberHoelzeman, Ronaldhoelzema@engr.pitt.eduHOELZEMA
Date: 8 September 2008
Date Type: Completion
Defense Date: 19 July 2007
Approval Date: 8 September 2008
Submission Date: 6 July 2007
Access Restriction: No restriction; Release the ETD for access worldwide immediately.
Institution: University of Pittsburgh
Schools and Programs: Swanson School of Engineering > Electrical Engineering
Degree: PhD - Doctor of Philosophy
Thesis Type: Doctoral Dissertation
Refereed: Yes
Uncontrolled Keywords: Compiler; Design Automation; Power Macromodeling; RFID; SystemC
Other ID: http://etd.library.pitt.edu/ETD/available/etd-07062007-162818/, etd-07062007-162818
Date Deposited: 10 Nov 2011 19:50
Last Modified: 19 Dec 2016 14:36
URI: http://d-scholarship.pitt.edu/id/eprint/8282

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