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Accelerating Real-Time, High-Resolution Depth Upsampling on FPGAs

Langerman, David (2019) Accelerating Real-Time, High-Resolution Depth Upsampling on FPGAs. Master's Thesis, University of Pittsburgh. (Unpublished)

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Abstract

While the popularity of high-resolution, computer-vision applications (e.g. mixed reality, autonomous vehicles) is increasing, there have been complementary advances in time-of-flight (ToF) depth-sensor resolution and quality. These advances in ToF sensors provide a platform that can enable real-time, depth-upsampling algorithms targeted for high-resolution video systems with low-latency requirements. This thesis demonstrates that filter-based upsampling algorithms are feasible for real-time, low-power scenarios, such as those on HMDs. Specifically, the author profiled, parallelized, and accelerated a filter-based depth-upsampling algorithm on an FPGA using high-level synthesis tools from Xilinx. We show that our accelerated algorithm can accurately upsample the resolution and reduce the noise of ToF sensors. We also demonstrate that this algorithm exceeds the real-time requirements of 90 frames-per-second (FPS) and 11 ms latency of mixed-reality hardware, achieving a lower-bound speedup of 40 times over the fastest CPU-only version and a 4.7 times speedup over the original GPU implementation.

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Details

Item Type: University of Pittsburgh ETD
Status: Unpublished
Creators/Authors:
CreatorsEmailPitt UsernameORCID
Langerman, Daviddavid.langerman@pitt.edudal181
ETD Committee:
TitleMemberEmail AddressPitt UsernameORCID
Committee ChairGeorge, Alanalan.george@pitt.edu
Committee MemberHu, JingtongJTHU@pitt.edu
Committee MemberJones, Alexakjones@pitt.edu
Date: 18 June 2019
Date Type: Publication
Defense Date: 22 March 2019
Approval Date: 18 June 2019
Submission Date: 27 March 2019
Access Restriction: 1 year -- Restrict access to University of Pittsburgh for a period of 1 year.
Number of Pages: 25
Institution: University of Pittsburgh
Schools and Programs: Swanson School of Engineering > Electrical and Computer Engineering
Degree: MS - Master of Science
Thesis Type: Master's Thesis
Refereed: Yes
Uncontrolled Keywords: FPGA, accelerator, depth-upsampling, real time, mixed reality, head-mounted display
Date Deposited: 18 Jun 2019 17:38
Last Modified: 18 Jun 2020 05:15
URI: http://d-scholarship.pitt.edu/id/eprint/36137

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